rs,Logic microoperations,Shift Microoperations Unit-2=Fixed-Point Representation,Integer Representation,Addition Subtraction Algorithm,Hardware Implementation,Multiplication Hardware Implementation and Algorithm,Booth Algorithm,Division Aldorithm,Restoring Method,Non-restoring Method,Floating point representation,Normalization,Hardwired & micro-programmed control unit,Hardwired Control Unit,Micro-programmed Control Unit ,Control Memory ,Micro Program sequencer UNIT-3= Central Progressing Unit (CPU) STACK ORGANIZATION ,Register Stack,Memory Stack,Reverse Polish Notation,Instruction Format,Operation Code,Source / Destination operand,Source operand address,Destination operand address,Next instruction address,Address Instructions ,THREE-ADDRESS INSTRUCTION,TWO-ADDRESS INSTRUCTIONS,ONE-ADDRESS INSTRUCTIONS,ZERO-ADDRESS INSTRUCTIONS ,RISC Architecture,CISC Architecture,Addressing Modes ,Instruction Cycle ,Modes of Data Transfer,Direct memory access (DMA),Daisy Chaining Priority UNIT 4- Computer memory system Memory hierarchy ,,Main Memory, Auxiliary Memory,Cache Memory,Hit Ratio,Associative Memory,Mapping And its Types,Write Policy,Virtual Memory,Address Space, Address Mapping,Paging,Segmentation,TLB,Page fault,Effective Access Time,Replacement Algorithm Unit-5=Vector processor,Flynn's Classification,Hazard and its types,WAR,WAW,Register Forwarding,Contol HazardsAnd its resolving methods,Multiprocessing,Software implementation issues Flynn's ,SISD multiprocessing ,SIMD multiprocessing Array processor,MIMD